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SENIOR RF IC Design Engineer
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Country: USA
Location: California-Silicon Valley/San Jose CA
Total applied: 40 Job Category:Engineering
Relevant Work Experience:2+ to 5 Years
Location:CA
Status:Full Time, Temporary/Contract/Project, Employee
Occupations:Electrical/Electronics Engineering;RF/Wireless Engineering
Career Level:Manager (Manager/Supervisor of Staff)
Relevant Work Experience:2+ to 5 Years
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SENIOR RF IC Design Engineer
Description:
Job Description
� Design, lay out, and verify CMOS analog/mixed-signal and RF circuits for wireless applications, including mixers, LNAs, amplifiers, PLLs, ADC/DACs, filters, and dedicated analog processing circuits.
� Verify circuits and perform simulations using SpectreRF and AMS Designer within the Cadence IC design suite.
� Perform layout and layout verification, including parasitic extraction using Virtuoso and Assura based tools.
� Evaluate, measure, and debug silicon in the laboratory.
� Communicate simulation results and measurement data to management and design team.
Job Requirements
� Minimum of MS EE plus 10 years of experience in RF IC design; or, PhD plus 7 years of experience in RF IC design.
� Excellent understanding of RF CMOS design challenges and system-on-a-chip isolation techniques.
� Strong experience in wireless transceivers building blocks design, such as CMOS LNAs, mixer, filters, VCOs, RF PLLs, and power amplifiers.
� Strong experience in analog/mixed signals design (converters, baseband filters).
� Solid knowledge of analog signal processing and systems theory.
� Strong understanding of layout challenges for RF circuits.
� Strong hands-on experience in silicon evaluation, characterization, and bring up.
� Knowledge of deep-submicron CMOS technology (device physics, manufacturing process, DFM, ESD).
� Strong leadership skills.
� Effective product-development schedule-management skills.
� Experience in PA design is preferred (even in other technologies).
� Good communication and technical reporting skills, both written and oral.
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