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 Analog Mixed Signal IC Design Engineer (F9-66/67) Tempe, AZ

Details
Country: USA
Location: Arizona-Phoenix Tempe, AZ 85280
Total applied: 40
Job Category:Engineering
Relevant Work Experience:5+ to 7 Years
Education Level:Bachelor's Degree
Location:Tempe, AZ 85280
Status:Full Time, Employee
Occupations:General/Other: Engineering
Career Level:Experienced (Non-Manager)
Relevant Work Experience:5+ to 7 Years
Analog Mixed Signal IC Design Engineer (F9-66/67) Tempe, AZ

Analog Mixed Signal IC Design Engineer

(F9-66/67) Tempe, AZ

 

As diverse technologies that span the consumer, communications, and computing markets begin to converge, changing the digital media landscape, our flexibility and ease-of-use are increasingly driving the user experience.  At IDT, we are proud of our 27 years of living and thriving in our ever changing environment.  We are bringing together a team of remarkably talented and insightful people to explore the opportunities that the digital media explosion creates, with a focus on mixed signal semiconductor solutions.  We are enabling advances in download time, power efficiency, processing speed, quality and reliability, while lowering costs and speeding time-to-market for our customers.  This is the place to be.

 

 

Responsibilities

 

Analog Mixed-Signal IC Design Engineering position will provide key contributions to state of the art PLL’s for use in high performance networking and communications products.  Involvement product definition, design, layout, lab verification and releases to production.

 

Requirements

 BSEE and MSEE with 5 years professional IC design experience with strong emphasis on analog and digital transistor level circuit designA solid track record in CMOS and/or BiCMOS PLL design is requiredKey areas of interest include: design and layout of analog (crystal oscillators, PD, CP, op-amps, VCO’s, bias drivers, regulators, I/O’s) and digital (high frequency dividers and serial/parallel interfaces) transistor level circuitsUnderstanding of simulation models,  design rules, verification procedures (DRC/LVS/ERC) and back annotation of parasitics is essentialExperience with Cadence tools and lab equipment is a plusGreat attitude, self motivation and excellent team work is a must

 

To be the employer of choice for rapidly developing top talent who want to maximize their personal impact on our technology, customers & company; who thrive in an atmosphere that has the intimacy, agility & competitiveness of a small company with the resources &  reach of a large one.

- Apply for Analog Mixed Signal IC Design Engineer (F9-66/67) Tempe, AZ


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