VLSI Design Engineer- MOSIS

The University of Southern California (USC), founded in 1880, is the largest private employer in the City of Los Angeles and proud recipient of Time Magazine's College of the Year 2000. USC offers competitive pay and an outstanding benefits package. USC’s Viterbi School of Engineering ISI is seeking a VLSI Design Engineer – MOSIS to join its team. ***Position located in Marina Del Rey, CA*** Job Accountabilities:• Supports internal and external designers and researchers with advanced electronic circuit design technologies. Develops and applies design methodologies to fabrication technologies for other operations and services under MOSIS. Assists users with design tools, libraries and technology files.• Formulates and documents procedures of libraries and technology files using commercially designed tools and design kits. Implements state-of-the-art design methodologies for advanced fabrication processes. Selects from variety of CAD tools the most appropriate equipment for users of MOSIS Service.• Establishes and maintains appropriate network of professional contacts. Maintains currency with professional organizations and publications.• Attends and participates in meetings, conferences and seminars as requested or required. Additional Information: Implements and supports place-and-route design activities, provides practical guidance in the integration and use of high-level description and synthesis languages (including RTL) and their simulators and common synthesis platforms; in carrying out physical design from synthesized netlists including integration of multiple blocks with generated memories, floorplanning of deep hierarchies, and abstraction of analog and black-box components; timing-driving routing, extracting interconnect parasitics, analysis/iteration; clock-tree generation and skew analyses; advising on I/O configuration for noise reduction; chip power estimation, and process corner analyses. Will maintain tools, enablement decks and libraries, assist in finalizing layouts for manufacturability and interfacing to the foundry. Minimum Qualifications:Bachelor's Degree with 3 years directly related industrial experience. Combined experience/education as substitute for minimum education. Preferred Qualifications:Masters Degree in Electrical Engineering, specializing in VLSI design. Demonstrate ability to work unassisted. Written and oral communication skills in English are essential. Must be able to explain to other designers how variations in specific process parameters can effect a given circuit performance metric. Must have a working knowledge of physical design issues at feature sizes below 100 nm and be able to implement design techniques and explain design strategies for addressing these issues. Compliance with export regulations and US Government contracts. Requires US Government Citizenship or US Lawful Permanent Residence.The University of Southern California values diversity and is committed to equal opportunity in employment. To apply for this position, please click on the Apply Now button below. AA/EOE