Lead/Principal Logic Designer

Major Responsibilities:

§ Key contributor to the logic design team, responsible for developing FPGAs, ASICs and digital hardware for advanced communications products.

§ Perform the following aspects of FPGA and ASIC design: regular interaction with other engineers, requirements analysis, specification, architecture, coding, test bench design, verification, synthesis, FPGA place and route and ASIC release.

§ Perform additional hardware engineering tasks including design, component selection, and validation of the entire product or system.

§ Working in a project team, work closely with software developers.

 

Qualifications:

§ 8+ years’ relevant technical experience in hardware design;

§ Experienced with FPGA design using VHDL with packet processing:

§ Positive can-do disposition;

§ Strong work ethic;

§ Results-oriented problem-solver who requires minimal supervision

§ BSEE/CS, or equivalent;

§ Excellent verbal and written communications skills and the ability to work in a team environment are required.

 

Preferences:

§ Knowledge of low power design techniques utilizing multiple clock domains and gated clocks is a plus

§ Experience with converting FPGA designs to ASICs is a plus.