Lead ASIC Verification Engineer ( MTS4)

Juniper’s Silicon Development group develops high-speed, multi-million gate ASICs for routers, firewalls, and other networking products. To deliver on-time and error-free, high performing, scalable, lowest cost, power efficient SILICON that is widely-deployable and beats the competition.Job Summary• Lead verification team to successfully complete block/chip/system level verification. Responsibilities• Perform ASIC verification for large, complex high-speed ASICs for Juniper's next generation of networking products. • Develop detailed test plans, block and system-level test benches, reference models and verification environments, achieve complete coverage to ensure first working silicon.• Develop functional models for System level architectural validation.• Lead ASIC and system bring-up.• Lead a team of engineers to successfully deliver chip from specification to tapeout.• Need to make and maintain schedule.• Develop modeling/verification/coverage methodology.• You will work closely with logic designers, software developers . Mentor junior engineers with the verification flow, strategy. Qualification• Requires a BS/MS EE or equivalent and a minimum of 7+ years of ASIC verification experience.• Strong Verilog, SystemC or C/C++, Perl/shell scripts or Vera programming skills.• Must have good leadership/communication skills.• Networking experience is highly desirable, but not required.• Track record of successfully managed/lead multiple ASIC's from start to finish.